The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2026

Filed:

Aug. 08, 2023
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Yasuhiro Shiino, Fujisawa Kanagawa, JP;

Kenrou Kikuchi, Fujisawa Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/08 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/102 (2013.01); G11C 16/08 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a first memory sub-block and a second memory sub-block arranged in a first direction and a control circuit. The first memory sub-block includes a first memory cell and a first word line connected to the first memory cell. The second memory sub-block includes a second memory cell and a second word line connected to the second memory cell. The control circuit executes a first and a second write operation on the first memory cell. In the first write operation, the control circuit applies a program voltage to the first word line and a first unselect write voltage to the second word line. In the second write operation, the program voltage is applied to the first word line and a second unselect write voltage is applied to the second word line.


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