The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2026

Filed:

Jul. 17, 2024
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventors:

Manish K. Shah, Austin, TX (US);

Gregory Frederick Grohoski, Bee Cave, TX (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 9/30 (2018.01); G06F 9/445 (2018.01); G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
G06F 15/80 (2013.01); G06F 9/3013 (2013.01); G06F 9/44505 (2013.01); G06F 15/7867 (2013.01); G06F 15/7885 (2013.01);
Abstract

A reconfigurable processor is disclosed, featuring an array of configurable units interconnected by a bus system. Each configurable unit includes a configuration data store structured as a shift register that includes individually addressable argument registers. Program load logic is responsible for receiving sub-files of configuration data through the bus system and sequentially shifting them into the configuration data store, including the argument registers. Argument load logic is designed to receive argument data via the bus system and directly load it into the argument registers without the need for shifting through the shift register.


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