Systems and methods for operating a serial peripheral interface (spi) network

Abstract

A system includes a master device and multiple slave devices connected in a daisy chain arrangement, and configured to communicate according to a serial peripheral device interface (SPI) protocol. The master device includes circuitry to clock a series of bits into respective shift registers of the multiple slave devices, including (a) first data clocked into first shift registers of a first slave device and (b) an ignore command clocked into second shift registers of a second slave device, and use a clock signal to communicate an execute instruction to the plurality of slave devices. The execute instruction causes the first slave device to write the first data from the first shift registers to a first memory of the first slave device, whereas the execute instruction causes the second slave device to execute the ignore command to preclude a data write at a second memory of the second slave device.