The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2026

Filed:

May. 31, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Ju Hyung Lee, Siheung-si, KR;

Dong UK Kwon, Asan-si, KR;

Sun Chul Kim, Hwaseong-si, KR;

Yong Hyun Kim, Asan-si, KR;

Min Jae Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 24/75 (2013.01); H01L 23/3128 (2013.01); H01L 23/5383 (2013.01); H01L 23/5389 (2013.01); H01L 24/81 (2013.01); H01L 2224/75305 (2013.01); H01L 2224/81203 (2013.01); H01L 2924/3512 (2013.01);
Abstract

A method of fabricating a semiconductor package includes disposing a preliminary semiconductor package on a stage, the preliminary semiconductor package including a substrate to which a pad part is attached, an interposer disposed on the substrate, and a semiconductor chip disposed between the substrate and the interposer. A bonding tool is disposed on the interposer. The bonding tool includes a first region and a second region outside of the first region. The second region of the bonding tool corresponds to the pad part. The interposer and the substrate are bonded to each other.


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