The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2026
Filed:
Jul. 29, 2022
Qualcomm Incorporated, San Diego, CA (US);
Mahalingam Nagarajan, San Diego, CA (US);
Vaishnav Srinivas, Oceanside, CA (US);
Nitin Juneja, Fremont, CA (US);
Christophe Avoinne, San Diego, CA (US);
Xavier Loic Leloup, San Diego, CA (US);
Michael David Jager, Camberley, GB;
Charles David Paynter, Encinitas, CA (US);
Joon Young Park, San Diego, CA (US);
QUALCOMM INCORPORATED, San Diego, CA (US);
Abstract
A package comprising a substrate comprising at least one dielectric layer and a plurality of interconnects; a first integrated device coupled to the substrate through a first plurality of solder interconnects, wherein the first plurality of solder interconnects includes a first plurality of inner solder interconnects and a first plurality of perimeter solder interconnects; and a second integrated device coupled to the substrate through a second plurality of solder interconnects. The first integrated device is configured to be electrically coupled to the second integrated device through an electrical path. The electrical path comprises an inner solder interconnect from the first plurality of inner solder interconnects, at least one interconnect from the plurality of interconnects, and a solder interconnect from the second plurality of solder interconnects.