The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2026

Filed:

Nov. 13, 2024
Applicant:

Cxmt Corporation, Hefei, CN;

Inventors:

Zequn Huang, Hefei, CN;

Kai Sun, Hefei, CN;

Assignee:

CXMT CORPORATION, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01); G11C 11/406 (2006.01); G11C 11/4076 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/106 (2013.01); G11C 11/40611 (2013.01); G11C 11/40615 (2013.01); G11C 11/4076 (2013.01); H03K 19/20 (2013.01);
Abstract

Provided are a control circuit, a control method, and a semiconductor memory. The control circuit includes a timing control module and a command control module. An output terminal of the timing control module is connected to an input terminal of the command control module. The timing control module is configured to receive a first clock signal, perform counting based on the first clock signal, generate an error check and scrub (ECS) flag signal, and send the ECS flag signal to the command control module. The ECS flag signal is in a valid state when a counting value meets a preset condition. The command control module is configured to receive the ECS flag signal, obtain a refresh command signal when the ECS flag signal is in the valid state, and generate an ECS command signal based on the refresh command signal.


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