The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2026

Filed:

May. 05, 2022
Applicant:

Koninklijke Philips N.v., Eindhoven, NL;

Inventors:

Jean-Luc Francois-Marie Robert, Cambridge, MA (US);

Iason Zacharias Apostolakis, Cambridge, MA (US);

Oudom Somphone, Paris, FR;

Fernando Quivira, Cambridge, MA (US);

Jun Seob Shin, Winchester, MA (US);

Faik Can Meral, Mansfield, MA (US);

Francois Guy Gerard Marie Vignon, Andover, MA (US);

Jason Richard Yu, Arlington, MA (US);

Assignee:

KONINKLIJKE PHILIPS N.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A61B 8/00 (2006.01); A61B 8/14 (2006.01); G01S 15/89 (2006.01); G06T 1/20 (2006.01);
U.S. Cl.
CPC ...
A61B 8/5207 (2013.01); A61B 8/14 (2013.01); A61B 8/4488 (2013.01); A61B 8/54 (2013.01); G01S 15/8927 (2013.01); G01S 15/8995 (2013.01); G06T 1/20 (2013.01); G06T 2210/41 (2013.01);
Abstract

An ultrasound imaging system includes acoustic elements configured to transmit ultrasound energy and receive associated echoes. The system further includes a processor circuit in communication with the acoustic elements. The processor circuit may be configured to receive data corresponding to a set of subframes based on the echoes. The set of subframes includes a first and second subframe. The processor circuit may be configured to coherently combine data corresponding to a first portion of the first subframe and data corresponding to a first portion of the second subframe, which may both include phase information. The processor circuit may be configured to generate an image based on the coherent combination of the first portion of the first subframe and the first portion of the second subframe and to output the generated image to a display in communication with the processor circuit.


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