The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Mar. 11, 2022
Kioxia Corporation, Tokyo, JP;
Ryo Fukuoka, Yokkaichi, JP;
Fumitaka Arai, Yokkaichi, JP;
Kouji Matsuo, Ama, JP;
Hiroaki Kosako, Yokkaichi, JP;
Keiji Hosotani, Yokkaichi, JP;
Takayuki Kakegawa, Yokkaichi, JP;
Shinya Naito, Toyota, JP;
Shinji Mori, Nagoya, JP;
Kioxia Corporation, Tokyo, JP;
Abstract
A semiconductor memory device includes a first semiconductor layer, first conductive layers, electric charge accumulating portions, a first conductivity-typed second semiconductor layer, a first wiring, a second conductivity-typed third semiconductor layer, and a second conductive layer. The first semiconductor layer extends in a first direction. First conductive layers are arranged in the first direction and extend in a second direction. Electric charge accumulating portions are disposed between the first semiconductor layer and first conductive layers. The second semiconductor layer is connected to one end of the first semiconductor layer. The first wiring is connected to the first semiconductor layer via the second semiconductor layer. The third semiconductor layer is connected to a side surface in a third direction of the first semiconductor layer. The second conductive layer extends in the second direction and is connected to the first semiconductor layer via the third semiconductor layer.