The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Feb. 28, 2023
Qualcomm Incorporated, San Diego, CA (US);
Srinivas Katar, Fremont, CA (US);
George Cherian, San Diego, CA (US);
Abhishek Pramod Patil, San Diego, CA (US);
Sai Yiu Duncan Ho, San Diego, CA (US);
Alfred Asterjadhi, San Diego, CA (US);
Gaurang Naik, San Diego, CA (US);
Yanjun Sun, San Diego, CA (US);
Abdel Karim Ajami, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Aspects are provided for BTM-based load balancing. Various aspects relate generally to a method of load balancing where an AP multi-link device (MLD) recommends that a non-AP MLD move to an indicated set of links of the AP MLD and operate on the indicated set of links without purging context between the AP MLD and the non-AP MLD. In some examples, if the non-AP MLD does not comply, then the non-AP MLD may face disassociation from the AP MLD. Some aspects more specifically relate to recommending that the non-AP MLD move to an indicated set of links of a different AP MLD and operate on the indicated set of links of the different AP MLD after performing a multi-link setup with the different AP MLD. In some examples, the AP MLD may then disassociate from the non-AP MLD.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile