The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Jan. 20, 2023
Dell Products L.p., Round Rock, TX (US);
Senthil Kumar Ganesan, San Ramon, CA (US);
Venkatesan Mahalingam, Pleasanton, CA (US);
Vinoth Kumar Arumugam, Fremont, CA (US);
DELL PRODUCTS L.P., Round Rock, TX (US);
Abstract
Current data center deployments, particularly layer 2 (L2) deployments that use multi-chassis link aggregation group (MC-LAG) implementations, have limitations. Such deployments use a link, known as an inter-node link (INL)/inter-chassis link (ICL), to connect peer information handling system nodes. Because the peer nodes are coupled together via one or more INL connections, there are fewer ports available for each peer node to connect to end nodes. This configuration creates limitations to bandwidth and scaling, and also increases costs. Embodiments herein allow for the elimination of INLs by moving forwarding decisions to the spine node level. In one or more embodiments, a spine node determines ports to reach dual-homed, single-homed, and orphaned nodes that are connected to leaf node(s) based on information learned from the leaf nodes. For a leaf node, a sub-LAG (link aggregation group) may be created to reach single-homed/orphaned nodes connected to the leaf node.