The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Feb. 14, 2024
Nxp B.v., Eindhoven, NL;
Sandeep Singh Jasrotia, Noida, IN;
Christopher Micielli, Austin, TX (US);
Abhishek Aggarwal, Delhi, IN;
Abhinav Nawal, Noida, IN;
NXP B.V., Eindhoven, NL;
Abstract
System-on-Chip (SoC) integrated circuits, methods of operating such circuits, and methods and systems for avoiding wakeup failures relating to such circuits are disclosed herein. In one example embodiment, the present disclosure relates to a SoC integrated circuit that includes core circuitry including one or more control components, and peripheral input/output (IO) circuitry including an input circuit portion, a plurality of IO pads, and a feedback generation cell, which is configured to send at least one feedback signal to be received by the one or more control components in response to a first one of one or more intermediate signals sent by the input circuit portion. The one or more control components is/are configured to send, after the one or more control components have received the at least one feedback signal, one or more input buffer enable signals to be received by the IO pads to avoid a wakeup failure.