The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2026

Filed:

Feb. 13, 2024
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Yi Jiang, Cupertino, CA (US);

Boon W Shiu, Palo Alto, CA (US);

Jason C Sauers, Sunnyvale, CA (US);

Jia-Woei Chen, Campbell, CA (US);

Killian J Poore, San Jose, CA (US);

Lijun Zhang, Los Gatos, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 1/27 (2006.01); G06F 1/16 (2006.01); H01Q 1/38 (2006.01); H05K 1/02 (2006.01); H05K 1/03 (2006.01);
U.S. Cl.
CPC ...
H01Q 1/273 (2013.01); G06F 1/163 (2013.01); G06F 1/1698 (2013.01); H01Q 1/38 (2013.01); H05K 1/0237 (2013.01); H05K 1/028 (2013.01); H05K 1/0313 (2013.01); H05K 2201/10098 (2013.01); H05K 2201/10128 (2013.01);
Abstract

A head-mounted device may have a head-mounted housing that is configured to be worn on a head of a user. While the head-mounted device is being worn, optical modules in the head-mounted device may provide images to eye boxes located rearward of the head-mounted device. A forward-facing display on a front portion of the head-mounted device may be covered with a transparent housing portion forming a display cover layer. An antenna may be mounted in the device. A curved portion of the display cover layer or other dielectric housing layer may overlap the antenna. The antenna and/or other components may be formed by contouring a flexible printed circuit into a shape characterized by a surface with compound curvature. The contoured flexible printed circuit may have polymer layers and a metal trace between the polymer layers. A neutral stress plane may be aligned with the metal trace.


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