The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2026

Filed:

May. 23, 2024
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

James Christopher Lucero, Seattle, WA (US);

Jonathan Michael Blair, Seattle, WA (US);

Bradley Robert Martin, Snohomish, WA (US);

Rathi Kartheek, Cupertino, CA (US);

Miguel A. Claudio, Redmond, WA (US);

Al Zarko, Monroe, WA (US);

Alexei Aleksenko, Kirkland, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 1/3215 (2019.01);
U.S. Cl.
CPC ...
G06F 11/0781 (2013.01); G06F 1/3215 (2013.01); G06F 11/0751 (2013.01); G06F 2201/86 (2013.01);
Abstract

A power state framework executes a workload in supported computing device types and configurations during a sequence of power state transitions to simulate user experiences. Workloads can be combined, e.g., default workload plus add-on workload(s). Device states are monitored, collected, reported, and analyzed to identify faults, which are prioritized for repair, e.g., based on the projected impact of the faults on users, e.g., if the users were to experience the faults. Computing device states include states of attached peripheral devices and wireless or wired connectivity before and after power state transitions. Device state indicates device stability throughout supported device power state transitions. Devices under test can be on debuggers during execution of workload and power state transitions. Automated, accelerated simulation of the execution of end user workloads and power state transitions in actual computing devices saves time and avoids replication errors compared to manual user-driven device testing.


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