The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Mar. 01, 2024
Nvidia Corporation, Santa Clara, CA (US);
Manan Patel, San Jose, CA (US);
Ivan Tanasic, San Francisco, CA (US);
Daniel Marcovitch, Yokneam, IL;
Michael Allen Parker, San Jose, CA (US);
Srinivas Santosh Kumar Madugula, Visakhapatnam, IN;
Raghuram L, Bangalore, IN;
Wishwesh Anil Gandhi, Sunnyvale, CA (US);
Olivier Giroux, Santa Clara, CA (US);
NVIDIA CORPORATION, Santa Clara, CA (US);
Abstract
Various embodiments include techniques for performing memory synchronization operations between processors in a multiprocessor computing system. A first processor transfers data by issuing memory operations to store the data to a shared memory. The first processor issues an asynchronous release operation to a load store unit. In response, the load store unit issues a memory synchronization operation to ensure that the data associated with the memory operations is visible in the shared memory. While the asynchronous release operation is pending, the first processor is able to issue further instructions and perform other operations. When the data associated with the memory operations is visible in the shared memory, the memory synchronization operation completes and the load store unit writes a flag to a separate memory location. Upon detecting that the flag has been written, a second thread, and/or other threads, can reliably read the data stored in the shared memory.