The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2026

Filed:

Sep. 28, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Elizabeth Stewart, Dallas, TX (US);

Jeffrey Alan West, Dallas, TX (US);

Byron Williams, Plano, TX (US);

Pijush Kanti Ghosh, Sachse, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5223 (2013.01); H01L 21/76832 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53295 (2013.01); H01L 24/48 (2013.01); H01L 25/0655 (2013.01); H01L 2224/48101 (2013.01); H01L 2224/48138 (2013.01); H01L 2924/1205 (2013.01);
Abstract

The present disclosure generally relates to a capacitor on an integrated circuit (IC) die. In an example, a package includes first and second IC dice. The first IC die includes a first circuit, a capacitor, and a polyimide layer. The first circuit is on a substrate. The capacitor includes a bottom plate over the substrate and a top plate over the bottom plate. The polyimide layer is at least partially over the top plate. A distance from a top surface of the top plate to a bottom surface of the polyimide layer is at least 30% of a distance from a top surface of the bottom plate to a bottom surface of the top plate. A signal path, including the capacitor, is electrically coupled between the first circuit and a second circuit in the second IC die, which does not include a galvanic isolation capacitor in the signal path.


Find Patent Forward Citations

Loading…