The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2026
Filed:
Feb. 02, 2023
Applicant:
Skyworks Solutions, Inc., Irvine, CA (US);
Inventors:
Guillaume Alexandre Blin, Carlisle, MA (US);
Engin Ibrahim Pehlivanoglu, Costa Mesa, CA (US);
Assignee:
Skyworks Solutions, Inc., Irvine, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); G01R 1/073 (2006.01); G01R 31/26 (2020.01); G01R 31/28 (2006.01); H01L 23/48 (2006.01); H01L 23/525 (2006.01); H01L 23/58 (2006.01); H01L 25/065 (2023.01); H10B 20/25 (2023.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); G01R 1/07342 (2013.01); G01R 31/2601 (2013.01); G01R 31/2884 (2013.01); H01L 22/14 (2013.01); H01L 22/20 (2013.01); H01L 22/34 (2013.01); H01L 23/481 (2013.01); H01L 23/585 (2013.01); H01L 25/0655 (2013.01); H01L 23/5256 (2013.01); H10B 20/25 (2023.02);
Abstract
A probe card for testing or trimming or programming a semiconductor wafer including a first die including a first integrated circuit having a trimmable or programmable component. The probe card including at least one probe arranged to make electrical contact with at least one probe pad arranged on the wafer. The at least one probe pad being electrically connected to the trimmable or programmable component and being arranged in a saw street of the wafer.