Phase interpolator circuitry with post-distortion linearization

Abstract

The current disclosure is directed to a phase interpolator (PI) with phase correction circuitry. The phase interpolator may generate a clock signal with a phase value. The phase correction circuitry may adjust the phase value of the clock signal to compensate for at least a portion of the undesired distortions. The phase correction circuitry may store pre-determined delay values to at least partially compensate for the undesired distortions of the clock signal based on the control signals. The phase correction circuitry may output the clock signal, as adjusted, with improved phase value accuracy and/or clock signal linearity. In some cases, the phase correction circuitry may improve operations of the phase interpolator, or an electronic system including the phase interpolator, across variations in process, voltage, and/or temperature.