The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2026

Filed:

Apr. 10, 2023
Applicant:

Lansus Technologies Inc., Shenzhen, CN;

Inventors:

Liyuan Cai, Shenzhen, CN;

Kai Xuan, Shenzhen, CN;

Jiashuai Guo, Shenzhen, CN;

Assignee:

LANSUS TECHNOLOGIES INC., Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 1/42 (2006.01); H03F 3/24 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0288 (2013.01); H03F 1/42 (2013.01); H03F 3/245 (2013.01); H03F 2200/222 (2013.01); H03F 2200/36 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01);
Abstract

A broadband Doherty power amplifier is provided, which includes a power divider, a carrier power amplifier circuit, a peak power amplifier circuit, and a load modulation network. The carrier power amplifier circuit includes a carrier input matching circuit, a carrier power amplifier, and a carrier output matching circuit. The peak power amplifier circuit includes a peak input matching circuit, a peak power amplifier and a peak output matching circuit. A resistance value of a system load is Z. An output impedance of the carrier output matching circuit is Zand meets Z=Z(n+1). An output impedance of the peak output matching circuit is Zand meets Z=Z(n+1)/n. The load modulation network is configured to set an impedance of a combination point to be Z, whose resistance value is Z. A method of implementing a broadband Doherty power amplifier is further provided.


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