The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2026
Filed:
Apr. 05, 2024
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Graeme G. Mackay, Austin, TX (US);
Jin-Jyh Su, Austin, TX (US);
Hasnain Akram, Austin, TX (US);
Changjong Lim, Gyeonggi-do, KR;
Dave Marshnil, Cupertino, CA (US);
Cirrus Logic Inc., Austin, TX (US);
Abstract
A multi-level power converter configured to receive a power supply and generate an inductor current may include a first switch coupled to a first capacitor, a second switch coupled to a second capacitor, a third switch coupled to a third capacitor, a fourth switch, an inductor coupled to a switch node between the second switch and the third switch, and a flying capacitor having a first terminal coupled to a first node between the first and second switch and a second terminal coupled to a second node between the third and fourth switch, wherein the second capacitor is configured to share charge with at least one of the first capacitor and the third capacitor to enable non-gate terminals of at least one of the first switch, the second switch, and the third switch to replenish with charge at or approximate to a duty cycle extreme of the multi-level power converter.