Seamless update provisioning for common chipsets carrying different cpu families

Abstract

A system for network management comprising a silicon management system operating on a processor that causes the processor to load one or more algorithms stored in a non-transient data memory to cause the processor to identify a version for a plurality of silicon data processing devices and to implement an update to one or more of the silicon data processing devices, a chipset management system operating on a processor that causes the processor to load one or more algorithms stored in a non-transient data memory to cause the processor to identify a version for a plurality of chipsets, each chipset associated with one of the silicon data processing devices and to implement an update to one or more of the chipsets and a boot system configured to cause a system associated with the updated silicon data processing devices and the updated chipsets to reboot.