The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2026

Filed:

Mar. 29, 2023
Applicant:

Japan Display Inc., Tokyo, JP;

Inventors:

Hajime Watakabe, Tokyo, JP;

Masashi Tsubuku, Tokyo, JP;

Toshinari Sasaki, Tokyo, JP;

Takaya Tamaru, Tokyo, JP;

Assignee:

Japan Display Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/385 (2006.01); H10D 30/67 (2025.01); H10D 99/00 (2025.01); G02F 1/1368 (2006.01); H10D 30/60 (2025.01); H10K 59/122 (2023.01);
U.S. Cl.
CPC ...
H10D 99/00 (2025.01); H01L 21/385 (2013.01); H10D 30/6755 (2025.01); H10D 30/6757 (2025.01); G02F 1/13685 (2021.01); H01L 21/02565 (2013.01); H01L 21/02631 (2013.01); H01L 21/02667 (2013.01); H10D 30/615 (2025.01); H10D 30/6739 (2025.01); H10K 59/122 (2023.02);
Abstract

A method for manufacturing semiconductor device according to an embodiment includes: forming a first metal oxide layer containing aluminum as a main component above a substrate; forming an oxide semiconductor layer above the first metal oxide layer; forming a gate insulating layer above the oxide semiconductor layer; forming a second metal oxide layer containing aluminum as a main component above the gate insulating layer; performing a heat treatment in a state where the second metal oxide layer is formed above the gate insulating layer; removing the second metal oxide layer after the heat treatment; and forming a gate electrode above the gate insulating layer.


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