The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2026

Filed:

Sep. 19, 2023
Applicant:

Skyworks Solutions, Inc., Irvine, CA (US);

Inventors:

Guillaume Alexandre Blin, Carlisle, MA (US);

Yu Zhu, Wellesley, MA (US);

Assignee:

SKYWORKS SOLUTIONS, INC., Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/23 (2025.01); H10D 30/47 (2025.01); H10D 30/60 (2025.01); H10D 30/65 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 62/85 (2025.01); H10D 64/27 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 64/258 (2025.01); H10D 30/475 (2025.01); H10D 30/4755 (2025.01); H10D 30/603 (2025.01); H10D 30/65 (2025.01); H10D 62/126 (2025.01); H10D 62/154 (2025.01); H10D 62/158 (2025.01); H10D 62/8503 (2025.01); H10D 64/257 (2025.01); H10D 64/411 (2025.01); H10D 64/519 (2025.01); H10D 84/834 (2025.01);
Abstract

A transistor comprising a first drain region split into first and second drain sub-regions aligned lengthwise and separated by a first low conductivity region, a first source region disposed on a first side of the first drain region split into first and second source sub-regions aligned lengthwise and separated by a second low conductivity region, a second source region disposed on a second side of the first drain region opposite the first side, the second source region split into third and fourth source sub-regions aligned lengthwise and separated by a third low conductivity region, a first gate electrode finger disposed over first and second active regions between the first drain region and first source region, and a second gate electrode finger disposed over third and fourth active regions between the first drain region and second source region.


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