The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2026
Filed:
Feb. 16, 2024
Sandisk Technologies, Inc., Milpitas, CA (US);
Guangyuan Li, Santa Clara, CA (US);
Junsong Xing, San Jose, CA (US);
Fumiaki Toyama, Cupertino, CA (US);
Sandisk Technologies, Inc., Milpitas, CA (US);
Abstract
Word line switches are used to connect word lines to sources of voltage to perform memory operations. To save room in a non-volatile memory, it is proposed to share word line switches between neighboring memory arrays. To implement shared word line switches, two types of routing will be used: high metal routing for some shared word line switches and low metal routing for other shared word line switches. For the high metal routing, lateral routing is implemented in high metal layers to enable a word line switch to connect to two neighboring memory arrays. For the low metal routing, lateral routing is implemented in low metal layers to enable a word line switch to connect to two neighboring memory arrays. The high metal layers are positioned below the memory arrays and above the low metal layers. The low metal layers are positioned above the word line switches.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile