User controlled allocation of a specific cache line at time of access

Abstract

Systems and techniques for controlling allocation of a cache line when performing a memory access request are described. An example technique includes receiving a memory access request from a user interface. The memory access request includes an indication of whether a cache line associated with the memory access request is to be allocated into a lower level cache within a computing system. The cache line is written into a line buffer within a line engine in the computing system in response to receiving the memory access request. The cache line is moved from the line buffer to an upper level cache in the computing system, without involving the lower level cache, when the memory access request indicates the cache line is not to be allocated into the lower level cache.