The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2026

Filed:

Mar. 13, 2024
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Jack H. Choquette, Palo Alto, CA (US);

Stephen Anthony Bernard Jones, San Francisco, CA (US);

Maciej Piotr Tyrlik, Durham, NC (US);

Harold Carter Edwards, Campbell, CA (US);

Manan Patel, San Jose, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 3/06 (2006.01); G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0631 (2013.01); G06F 3/0613 (2013.01); G06F 3/064 (2013.01); G06F 3/0673 (2013.01);
Abstract

A first request to allocate one or more memory blocks of a first plurality of memory blocks associated with a first memory is received by a processing device. A consecutive set of a first portion of bits of a first register with a first logical state is identified. The first logical state indicates that corresponding memory blocks of the one or more memory blocks are free. A first operation to adjust the consecutive set of the first portion of bits of the first register to a second logical state is performed. An allocation address comprising an index of the consecutive set of the first portion of bits of the first register is sent to the first request. The allocation address is useable to access the corresponding memory blocks.


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