The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2026

Filed:

Mar. 28, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Hyunsu Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 23/544 (2006.01); H01L 25/065 (2023.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/565 (2013.01); H01L 23/3128 (2013.01); H01L 23/5386 (2013.01); H01L 23/5389 (2013.01); H01L 23/544 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 2223/54433 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/1058 (2013.01);
Abstract

A semiconductor package includes a first package substrate. A first semiconductor device is mounted on an upper surface of the first package substrate. A first molding is disposed on the first package substrate and covers the first semiconductor device. A second package substrate is disposed on the first molding. At least one second semiconductor device is mounted on an upper surface of the second package substrate. A second molding covers the second semiconductor device. The second molding has a marking pattern in the first region. The second molding has an uneven structure having a plurality of trenches that define a plurality of column structures protruding from a second region on the second semiconductor device.


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Kim, Hyunsu. (2026). Semiconductor package including stacked semiconductor devices and method of manufacturing the semiconductor package (U.S. Patent No. 12593708). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12593708

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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