The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 2026
Filed:
Nov. 14, 2022
Renesas Electronics Corporation, Tokyo, JP;
Ryo Ogura, Tokyo, JP;
Takahiro Maruyama, Tokyo, JP;
Renesas Electronics Corporation, Tokyo, JP;
Abstract
This is a manufacturing method of a semiconductor device having a first region, a second region, and a third region. A second gate dielectric film is formed on a semiconductor substrate in the second region. A thin first gate dielectric film is formed on the semiconductor substrate in the first region. A protective film is formed on the first gate dielectric film and on the second gate dielectric film. A thin paraelectric film is formed on the semiconductor substrate in the third region. An amorphous film formed of a material including a metal oxide and a first element is formed on the protective film and on the paraelectric film. A metal film is formed on the amorphous film. By performing a heat treatment, the amorphous film is crystallized to form a ferroelectric film.