The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2026

Filed:

Jul. 30, 2024
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Dongmin Ko, Suwon-si, KR;

Dongkwon Lee, Seoul, KR;

Dongsuk Jeon, Seoul, KR;

Youngdon Choi, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); H03K 3/012 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356113 (2013.01); H03K 3/012 (2013.01);
Abstract

A flip-flop includes a first precharge circuit, a first discharge circuit, a first inverter, a second discharge circuit, a second precharge circuit, a third discharge circuit, and a switching prevention circuit. The first precharge circuit selectively charges a first node based on a data input signal and a clock signal. The first discharge circuit selectively discharges the first node based on the data input signal. The first inverter outputs a first inverted signal by inverting a first signal of the first node. The second discharge circuit selectively discharges the second node based on the clock signal. The third discharge circuit selectively discharges the fourth node based on the clock signal, the first inverted signal and the second signal. The switching prevention circuit prevents a switching of a voltage level of the second node based on the first signal, due to a toggling of the clock signal.


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