The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2026

Filed:

Apr. 11, 2024
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Rajesh Kota, Austin, TX (US);

John H. Kelm, Belmont, CA (US);

Josh P. De Cesare, Los Gatos, CA (US);

Qing He, San Jose, CA (US);

Rohit K. Gupta, Saratoga, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/3234 (2019.01); G06F 1/3287 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3275 (2013.01); G06F 1/3287 (2013.01);
Abstract

Techniques are disclosed relating to reduced performance states in an integrated circuit. While in a first performance state, the integrated circuit powers components of the integrated circuit that access data from a memory via a memory controller that stores the data in a memory cache. The integrated circuit can transition to a second performance state in which the memory cache and a particular component of the components remain powered on while the remaining components are powered off and the memory is in a self-refresh mode. During the second performance state, the particular component can access data from a local memory and the memory cache. The integrated circuit can transition to a third performance state in which the memory is in the self-refresh mode, the memory cache is in a retention mode, and the particular component can access data from the local memory but not the memory cache.


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