The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Oct. 06, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Matthias Markert, Weinböhla, DE;

Cornelius Fuchs, Weinböhla, DE;

Jakob Kriz, Weinböhla, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10K 59/131 (2023.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); H10K 59/1201 (2023.02);
Abstract

A substrate arrangement for a micro display including a semiconductor substrate, a back end of line (BEOL) stack on the semiconductor substrate and wherein the BEOL stack comprises structured wiring layers, an insulating material structure (IMS), and a recess in the IMS, wherein the structured wiring layers are stacked and embedded in the insulating material structure, and wherein an upmost structured wiring layer of the structured wiring layers includes contact pads, and wherein the recess extends to a first set of contact pads; and a conductive layer on the surface of the BEOL stack, wherein the conductive layer includes a first portion including a contact pad array and wherein the conductive layer includes a second portion that is arranged on the first set of contact pads of the BEOL stack, and wherein the first portion of the conductive layer is electrically separated from the second portion of the conductive layer.


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