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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12588364 B1

PDFFull Text
Date of Patent:
Mar. 24, 2026

Filed:

Apr. 07, 2022

Display device and method for manufacturing the same

Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Jun Gi Kim, Hwaseong-si, KR;

Jeong Won Kim, Hwaseong-si, KR;

Tae Wook Kang, Seongnam-si, KR;

Jong Hee Park, Hwaseong-si, KR;

Hyun Eok Shin, Gwacheon-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:

Innovation Counsel LLP

Primary Examiner:

Britt Hanley

Assistant Examiner:

Victor V Barzykin

Int. Cl.
CPC ...
H10K 59/122 (2023.01); H10K 50/19 (2023.01); H10K 50/80 (2023.01); H10K 59/12 (2023.01); H10K 59/123 (2023.01); H10K 59/124 (2023.01); H10K 59/80 (2023.01); H10K 71/00 (2023.01);
U.S. Cl.
CPC ...
H10K 59/122 (2023.02); H10K 50/19 (2023.02); H10K 50/80 (2023.02); H10K 59/1201 (2023.02); H10K 59/123 (2023.02); H10K 59/124 (2023.02); H10K 59/80521 (2023.02); H10K 59/80518 (2023.02); H10K 71/00 (2023.02);
Abstract

A display device is provided. The display device comprises a substrate, at least one thin-film transistor disposed on the substrate, a planarization layer disposed on the thin-film transistor, a first metal layer disposed on the planarization layer and connected to the thin-film transistor, a first electrode disposed on the first metal layer, partitioning walls disposed on the planarization layer and spaced apart from the first electrode, wherein each of the partitioning walls includes a second metal layer and a first conductive layer, a pixel defining layer disposed on the first electrode and the partitioning walls, an organic layer disposed on the first electrode and the pixel defining layer, and a second electrode disposed on the organic layer, wherein the second metal layer is disposed under the first conductive layer and has an undercut beneath the first conductive layer, wherein at least portion of the organic layer is discontinuous between the partitioning walls.

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