The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Sep. 13, 2022
Applicant:

Lextar Electronics Corporation, Hsinchu, TW;

Inventors:

Kang-Hung Liu, Hsinchu, TW;

Chih-Hao Lin, Hsinchu, TW;

Shiou-Yi Kuo, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10H 20/831 (2025.01); H01L 23/00 (2006.01); H01L 25/13 (2006.01); H01L 25/16 (2023.01); H10H 20/01 (2025.01); H10H 20/84 (2025.01); H10H 20/853 (2025.01);
U.S. Cl.
CPC ...
H10H 20/831 (2025.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 25/13 (2013.01); H01L 25/167 (2013.01); H10H 20/018 (2025.01); H10H 20/84 (2025.01); H10H 20/853 (2025.01); H01L 2224/2919 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H10H 20/032 (2025.01); H10H 20/034 (2025.01); H10H 20/0362 (2025.01);
Abstract

A package structure is provided. The package structure has a light-emitting region and a non-light-emitting region that is adjacent to the light-emitting region, and includes a substrate, a first light-emitting layer, a second light-emitting layer and a third light-emitting layer. The first light-emitting layer, the second light-emitting layer and the third light-emitting layer are sequentially stacked on the substrate. Each of the first light-emitting layer, the second light-emitting layer and the third light-emitting layer includes a transparent adhesive layer disposed in the light-emitting region, a light-emitting diode (LED) chip disposed on the transparent adhesive layer, a redistribution layer formed on the LED chip and extending from the light-emitting region to the non-light-emitting region, and a planarization layer disposed on the LED chip and the redistribution layer.


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