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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12585849 B1

PDFFull Text
Date of Patent:
Mar. 24, 2026

Filed:

Nov. 30, 2023

Simulation method for estimating power consumption of integrated circuit and integrated circuit simulation system performing the same

Applicant:

Baum Design Systems Co., Ltd., Seoul, KR;

Inventors:

In Hak Han, Daejeon, KR;

Jonggyu Kim, Gyeonggi-do, KR;

Assignee:

Baum Design Systems Co., Ltd., Seoul, KR;

Attorney:

Nicholas Park

Primary Examiner:

Aurel Prifti

Int. Cl.
CPC ...
G06F 1/12 (2006.01); G06F 1/28 (2006.01); G06F 30/327 (2020.01); G06F 30/3312 (2020.01); G06F 30/3315 (2020.01); G06F 115/02 (2020.01); G06F 119/06 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 1/12 (2013.01); G06F 1/28 (2013.01); G06F 30/327 (2020.01); G06F 30/3315 (2020.01); G06F 2115/02 (2020.01); G06F 2119/06 (2020.01); G06F 2119/12 (2020.01);
Abstract

The technical idea of the present disclosure pertains to a simulation method and an integrated circuit simulation system for estimating power consumption of an integrated circuit. The method, according to this technical idea, involves determining a clock domain based on a clock flow in the integrated circuit, executing simulation for various modeling signals with different patterns in the targeted modeling clock domain, collecting an energy value consumed by each of the modeling signals based on a simulation result, and calculating the power consumption of the modeling clock domain based on at least one characteristic of the simulation clock.

Find Patent Forward Citations

Han, In. (2026). Simulation method for estimating power consumption of integrated circuit and integrated circuit simulation system performing the same (U.S. Patent No. 12585849). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12585849

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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