The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Jul. 18, 2023
Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Niravkumar Natwarbhai Patel, Bangalore, IN;

Shiv Harit Mathur, Bangalore, IN;

Sumanth Reddy Rathna, Bangalore, IN;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G06F 3/06 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0625 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); H03K 19/20 (2013.01);
Abstract

A system for altering an input/output (I/O) data signal of a NAND programming operation includes a skew-gen circuit comprising: a delay block coupled to an input of a two input logic OR gate, and a MUX logic gate coupled to an output of the logic OR gate. The skew-gen circuit is configured to: alter the pulse width of a input data signal by increasing the width of the data high signal and decreasing the width of the data low signal; and output the altered data signal to the MUX, the MUX configured to select either the altered data signal or the input data signal depending on the mode.


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