The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2026

Filed:

Aug. 22, 2023
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Christopher Petti, Mountain View, CA (US);

Veera Dandu, Albuquerque, NM (US);

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 80/00 (2026.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10B 61/00 (2023.01);
U.S. Cl.
CPC ...
H10B 80/00 (2023.02); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H10B 61/00 (2023.02); H01L 2224/08145 (2013.01); H01L 2224/80006 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1443 (2013.01);
Abstract

A bonded assembly of a first memory die and a second memory die is provided. The first memory die includes a first two-dimensional memory array of first MRAM cells, first access lines, second access lines, a first driver circuit configured to drive the first access lines, and a second driver circuit configured to drive the second access lines and third access lines. The second memory die includes a second two-dimensional memory array of second MRAM cells, the third access lines, and fourth access lines. Each of the third access lines is electrically connected to a respective one of the second access lines via first electrically conductive paths that extend through a horizontal interface between the first memory die and the second memory die.


Find Patent Forward Citations

Quick Actions:

Petti, Christopher. (2026). Bonded memory mram arrays sharing a common driver circuit and methods of making the same (U.S. Patent No. 12581665). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12581665

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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