The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2026

Filed:

Dec. 08, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

So Hyeon Bae, Suwon-si, KR;

Won Chul Lee, Suwon-si, KR;

Byeong Jun Bae, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H10B 12/50 (2023.02); H01L 21/02362 (2013.01); H10B 12/315 (2023.02); H10B 12/488 (2023.02);
Abstract

A semiconductor memory device may include a substrate including a cell region and a peripheral region defined around the cell region, and a gate structure which may include sequentially stacked first, second, and third conductive layers including different materials, the first conductive layer including polysilicon. A capping layer may be on the third conductive layer, and a spacer may be on a sidewall of each of the first to third conductive layers and the capping layer. A first contact may extend through the capping layer and into the third conductive layer, with the first contact in contact with the second conductive layer, and separated from the first conductive layer. The first contact may include a first portion in the third conductive layer and a second portion in the capping layer. A width of the first portion may be greater than a width of the second portion in a horizontal direction.


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