The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2026

Filed:

Aug. 12, 2024
Applicant:

Renesas Electronics America Inc., Milpitas, CA (US);

Inventors:

Marco Sautto, Zurich, CH;

Victor Khomenko, Bourne End, GB;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/20 (2006.01); H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017509 (2013.01); H03K 19/20 (2013.01);
Abstract

Systems and devices for signal arbitration are described. A plurality of asynchronous circuits can receive a plurality of non-persistent signals representing a plurality of requests and sanitize the plurality of non-persistent signals to generate a plurality of persistent signals. At least one logic circuit can arbitrate the plurality of persistent signals, where each one of the at least one logic circuit can include a mutual exclusive circuit configured to arbitrate two signals. Each logic circuit is one of a first logic circuit, a second logic circuit and a third logic circuit different from one another. A number of copies of the first logic circuit can be implemented in an initial level of arbitration and a number of copies of the second logic circuit and the third logic circuit can be implemented in additional levels of arbitration.


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