The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2026
Filed:
Nov. 03, 2021
Battelle Memorial Institute, Richland, WA (US);
Bharat Gnvsr Vyakaranam, Redmond, WA (US);
Tony B. Nguyen, Richland, WA (US);
Quan H. Nguyen, Richland, WA (US);
Nader A. Samaan, Richland, WA (US);
Mallikarjuna R. Vallem, Richland, WA (US);
Renke Huang, Richland, WA (US);
Battelle Memorial Institute, Richland, WA (US);
Abstract
A computer-implemented method includes extending simulation results and input data of a DC production cost model (PCM) of a power grid to an initial AC power flow model (PFM) using a generation distribution mapping and load distribution mapping of a related PFM base example associated with the PCM, and automatically producing a chronological series of converged AC PFM solutions associated with a PCM time series by, for each time step of the PCM time series: (i) updating inputs of an AC PFM using (a) PCM results of the current time step and (b) solution outputs of a converged AC PFM obtained from a previous PCM time step, and (ii) iteratively, reducing nodal loads by a gradual amount configured to account for power grid power flow losses unaccounted for by the PCM and performing AC PFM numerical analyses, until: (a) an AC PFM convergence is obtained and (b) a real power generation slack bus is less than or equal to a predefined tolerance in relation to a slack bus of the PCM results of the current time step.