The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2026

Filed:

Feb. 20, 2025
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Hyuk Kim, Yongin-si, KR;

Boyong Chung, Yongin-si, KR;

Tak Young Lee, Yongin-si, KR;

Sang-UK Lim, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/32 (2016.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3233 (2013.01); G09G 3/32 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0286 (2013.01);
Abstract

A stage of a gate driver includes a sensing input circuit a sensing input signal, a scan input circuit, a Q node separating circuit between a sensing Q node and a scan Q node, a QB node controlling circuit, a sensing carry circuit configured to output a sensing carry signal based on a voltage of the sensing Q node and a voltage of a shared QB node, a sensing output circuit configured to output a sensing signal based on the voltage of the sensing Q node and the voltage of the shared QB node, a scan carry circuit configured to output a scan carry signal based on a voltage of the scan Q node and the voltage of the shared QB node, and a scan output circuit configured to output a scan signal based on the voltage of the scan Q node and the voltage of the shared QB node.


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