The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2026

Filed:

Oct. 28, 2025
Applicant:

Qpiai India Private Limited, Bangalore, IN;

Inventors:

Aswanth Krishnan, Bengaluru, IN;

Lakshya Priyadarshi, Lucknow, IN;

Sachin Kumar, Bengaluru, IN;

Manjunath Ramachandrappa Venkatesh, Bangalore, IN;

Swati Kumari, Bengaluru, IN;

Nagendra Nagaraja, Bangalore, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06N 10/70 (2022.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); G06F 11/07 (2013.01); G06F 11/0754 (2013.01); G06N 10/70 (2022.01);
Abstract

Systems and methods for dynamic error resolution in hybrid quantum-classical computing environments are disclosed. A system can obtain telemetry data corresponding to a processing job. The system can determine that an error resolution technique is to be applied to the quantum portion of the processing job. The system can select, for a quantum portion of the processing job, the error resolution technique from a plurality of error correction techniques and a plurality of error mitigation techniques. The system can update a hierarchical data structure representing the processing job as at least a set of nodes. The hierarchical data structure can be updated to include the error resolution technique in association with a respective node of the hierarchical data structure representing the quantum portion of the processing job.


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