The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2026
Filed:
Oct. 08, 2021
Teknologian Tutkimuskeskus Vtt Oy, Espoo, FI;
Pekka Pursula, Espoo, FI;
Vladimir Ermolov, Espoo, FI;
Antti Lamminen, Espoo, FI;
Jaakko Saarilahti, Espoo, FI;
Mikko Varonen, Espoo, FI;
Teknologian tutkimuskeskus VTT Oy, Espoo, FI;
Abstract
According to an example aspect of the present invention, there is provided a wafer-level package (), comprising a top substrate () and a bottom substrate (), wherein the top substrate () comprises a recess () on a side of the top substrate () which is towards the bottom substrate () and the bottom substrate () comprises a recess () on a side of the bottom substrate () which is towards the top substrate (), wherein the recess () of the top substrate () and the recess () of the bottom substrate () are arranged to form a waveguide () within the wafer-level package () and a middle substrate () arranged to couple an integrated circuit () of the wafer-level package () to the waveguide (), wherein the middle substrate () is in between the top substrate () and the bottom substrate () and the middle substrate () comprises a probe (), wherein the probe () extends to the waveguide () and the probe () is arranged to couple a signal coming from the integrated circuit () to the waveguide (), or to couple a signal coming from the waveguide () to the integrated circuit ().