The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Sep. 01, 2023
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Tae Jung Ha, Icheon-si, KR;

Assignee:

SK HYNIX INC., Icheon-Si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01);
U.S. Cl.
CPC ...
H10N 70/826 (2023.02); H10B 63/80 (2023.02); H10N 70/021 (2023.02); H10N 70/041 (2023.02); H10N 70/063 (2023.02); H10N 70/066 (2023.02); H10N 70/883 (2023.02); G11C 13/0038 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01);
Abstract

Semiconductor devices and fabrication methods of semiconductor devices are disclosed. In an embodiment, a semiconductor device May include a plurality of memory cells, and each of the plurality of memory cells may include: a resistive layer including a material having a specific resistance and including a lower portion and an upper portion disposed over the lower portion, wherein a width of the lower portion is smaller than a width of an uppermost surface of the upper portion; a selector layer disposed over the resistive layer and structured to perform a threshold switching by exhibiting different electrically conductive states in response to an applied voltage relative to a threshold voltage; and a memory layer disposed over the selector layer and structured to store data.


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