The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Aug. 20, 2024
Applicant:

Trina Solar Co., Ltd., Changzhou, CN;

Inventors:

Daming Chen, Changzhou, CN;

Kuiyi Wu, Changzhou, CN;

Zigang Wang, Changzhou, CN;

Yifeng Chen, Changzhou, CN;

Assignee:

TRINA SOLAR CO., LTD., Changzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10F 71/00 (2025.01); B23K 26/082 (2014.01); B23K 26/36 (2014.01); B23K 101/40 (2006.01); H10F 77/20 (2025.01); H10F 77/30 (2025.01);
U.S. Cl.
CPC ...
H10F 71/00 (2025.01); B23K 26/082 (2015.10); B23K 26/36 (2013.01); H10F 77/215 (2025.01); H10F 77/219 (2025.01); H10F 77/311 (2025.01); B23K 2101/40 (2018.08);
Abstract

A method for preparing a solar cell includes providing a substrate with a first conducting layer, the substrate including a first surface and a second surface opposite to each other in a thickness direction of the substrate, the first conducting layer being formed on the first surface; forming a first electrode pattern on a side of the first conducting layer away from the substrate, the first electrode pattern being electrically connected to the first conducting layer, the first electrode pattern including a first soldering pattern, the first soldering pattern being configured for soldering to one or more first bus ribbons; forming a first dielectric layer on a side of the first electrode pattern away from the substrate, and covering the first electrode pattern with the first dielectric layer; and removing a portion of the first dielectric layer corresponding to the first soldering pattern, and exposing the first soldering pattern.


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