The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Feb. 20, 2024
Applicant:

Yazaki Corporation, Tokyo, JP;

Inventors:

Ryo Gondo, Susono, JP;

Michito Enomoto, Susono, JP;

Daisuke Maezaki, Susono, JP;

Yoshiya Ohnuma, Nagaoka, JP;

Shohei Komeda, Tokyo, JP;

Shunsuke Takuma, Nagaoka, JP;

Assignee:

YAZAKI CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/06 (2006.01); H02J 7/00 (2006.01); H02M 1/00 (2007.01); H02M 1/14 (2006.01); H02M 1/15 (2006.01); H02M 1/42 (2007.01); H02M 3/335 (2006.01); H02J 7/34 (2006.01);
U.S. Cl.
CPC ...
H02M 1/4233 (2013.01); H02J 7/00711 (2020.01); H02J 7/06 (2013.01); H02M 1/0058 (2021.05); H02M 1/007 (2021.05); H02M 1/143 (2013.01); H02M 1/15 (2013.01); H02M 1/42 (2013.01); H02M 1/4225 (2013.01); H02M 3/33573 (2021.05); H02J 7/345 (2013.01); H02M 1/4241 (2013.01);
Abstract

A charger is configured such that in case where control of switching of a DC/DC converter includes a first mode and a second mode, a dead time is provided between the first mode and the second mode when switching from the first mode to the second mode and a first switch of a power pulsation absorbing circuit is controlled to be in an off-state during a time until expiration of a predetermined time after start of the dead time, wherein in the first mode, at least one switch of switches of the DC/DC converter is switched on, at least one switch of the switches of the DC/DC converter is switched off, and the first switch of the power pulsation absorbing circuit is switched off, and wherein in the second mode, the switch of the DC/DC converter which is switched off in the first mode is switched on, and the first switch of the power pulsation absorbing circuit is switched on.


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