The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Aug. 08, 2024
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Jin Hyung Lee, Icheon-si, KR;

Su Hyun Oh, Icheon-si, KR;

Chang Kwon Lee, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/10 (2006.01); G11C 5/06 (2006.01); G11C 29/02 (2006.01); G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
G11C 29/10 (2013.01); G11C 5/06 (2013.01); G11C 29/025 (2013.01); G11C 29/50 (2013.01); G11C 2029/5006 (2013.01);
Abstract

A memory device includes a base die and a plurality of core dies stacked over the base die. The base die includes a first base scan control circuit connected to a first node connected to a first through via included in a first column and a second base scan control circuit connected to a second node connected to a second through via included in a second column. The first base scan control circuit sets the first node at a floating state when the first column is selected in a test mode and drives the first node when the second column is selected during the test mode.


Find Patent Forward Citations

Lee, Jin. (2026). Memory device detecting fail of through-silicon via (U.S. Patent No. 12573463). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12573463

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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