The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2026

Filed:

Dec. 22, 2022
Applicant:

Hkc Corporation Limited, Shenzhen, CN;

Inventors:

Zhaoyang Lu, Shenzhen, CN;

Baohong Kang, Shenzhen, CN;

Assignee:

HKC CORPORATION LIMITED, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 86/60 (2025.01); G02F 1/1333 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01);
U.S. Cl.
CPC ...
H10D 86/60 (2025.01); G02F 1/13629 (2021.01); H10D 86/021 (2025.01); H10D 86/441 (2025.01); G02F 1/133357 (2021.01); G02F 1/13454 (2013.01); G02F 1/136227 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01);
Abstract

Disclosed are an array substrate, a method for manufacturing an array substrate and a display device. The array substrate includes a display area, a gate driving circuit area and a signal line area. The display area is provided with a plurality of pixels. The gate driving circuit area is provided with a gate driving circuit for driving the pixels. The signal line area is provided with a plurality of signal lines for providing driving signals for the gate driving circuit. The signal line area includes a plurality of first metal layers and at least one second metal layer. The signal lines include a plurality of first signal lines and a plurality of second signal lines. The first signal lines are for accessing the driving signals and the second signal lines are for transmitting the driving signals to the gate driving circuit.


Find Patent Forward Citations

Lu, Zhaoyang. (2026). Array substrate for reducing width of signal lines, method for manufacturing the same and display device (U.S. Patent No. 12568689). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12568689

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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