The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2026

Filed:

Feb. 25, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jeeyong Kim, Hanam-si, KR;

Junghwan Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); H01L 25/10 (2006.01); H01L 25/18 (2023.01); H10B 12/00 (2023.01); H10B 41/27 (2023.01); H10B 43/30 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 25/18 (2013.01); H10B 12/02 (2023.02); H10B 41/27 (2023.02); H10B 43/30 (2023.02); H10B 43/35 (2023.02); H01L 25/105 (2013.01); H10B 43/40 (2023.02);
Abstract

A semiconductor device comprising: a substrate; an electrode structure disposed on the substrate while extending in a first direction, the electrode structure including a plurality of electrodes stacked in a second direction which is a vertical direction of the substrate; a bit line disposed on the electrode structure; vertical structures extending through the electrode structure in the second direction and contacting the substrate, each of the vertical structures including a vertical semiconductor pattern electrically connected to the bit line, and a data storage pattern surrounding a side wall of the vertical semiconductor pattern; common source plugs extending through the electrode structure in the second direction and contacting the substrate under a condition that the vertical structures are disposed among the common source plugs; and spacers respectively disposed to surround side walls of the common source plugs, each of the spacers including regions respectively having different nitride (N) concentrations.


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