The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2026

Filed:

Dec. 02, 2021
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Brian Branscomb, Hopkinton, MA (US);

William Mahany, West Islip, NY (US);

Sailesh Rupani, Telengana, IN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/64 (2013.01);
U.S. Cl.
CPC ...
G06F 21/64 (2013.01);
Abstract

Examples of the present disclosure relate generally to implementing higher-layer processing on time-sensitive data blocks at a physical-layer-interface device. Some examples include logic to perform operations, the operations including providing data blocks to a physical-layer-interface device. The operations may also include adding dummy data into one or more time-sensitive data blocks of the data blocks being provided to the physical-layer-interface device. A size of the dummy data corresponding to a size of higher-layer-processing data. Other example operations may include removing higher-layer-processing data from a first ingressing data block. The other operations may also include removing a portion of the first ingressing data block and adding the portion to a subsequent ingressing data block. A size of the portion corresponding to the size of integrity-detection data. The other operations may also include removing the integrity-detection data from an ingressing data block. Related methods, systems, and devices are also disclosed.


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