The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2026
Filed:
May. 03, 2024
Sandisk Technologies, Inc., Milpitas, CA (US);
Jaco Hofmann, Santa Clara, CA (US);
Richard New, Palo Alto, CA (US);
Dejan Vucinic, San Jose, CA (US);
Sandisk Technologies, Inc., Milpitas, CA (US);
Abstract
Technology for NAND in-memory compute. A NAND memory system uses a Vladder in which the expected (or estimated) voltage at the source terminal of a particular NAND memory cell transistor is factored into the determination of the voltage to apply to the gate. An estimate may be made of what voltage will be at the source terminal of each NAND memory cell transistor during in-memory computation. The voltage to apply to the gate of the NAND memory cell transistor may then be determined by adding the estimated source terminal voltage to the target V. Therefore, the actual Vis much closer to the target Vthereby improving accuracy of NAND in-memory compute.