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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12563914 B1

PDFFull Text
Date of Patent:
Feb. 24, 2026

Filed:

Mar. 20, 2020

Display panel for reducing wiring conflict, and display device

Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Biao Liu, Beijing, CN;

Mengmeng Du, Beijing, CN;

Xiangdan Dong, Beijing, CN;

Hongwei MA, Beijing, CN;

Tinghua Shang, Beijing, CN;

Haigang Qing, Beijing, CN;

Pengfei Yu, Beijing, CN;

Assignees:

CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Chengdu, CN;

BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;

Attorney:

DINSMORE & SHOHL LLP

Primary Examiner:

Norman D Richards

Assistant Examiner:

Sean Ayers Winters

Int. Cl.
CPC ...
H10K 59/131 (2023.01); G09G 3/00 (2006.01); H10K 59/121 (2023.01); H10K 59/122 (2023.01); H10K 102/00 (2023.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); G09G 3/006 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/122 (2023.02); G09G 2330/04 (2013.01); H10K 2102/311 (2023.02);
Abstract

The present disclosure provides a display panel and a display device. The display panel includes a display area and a peripheral area. The display area includes a plurality of sub-pixels on a substrate. The peripheral area including: a bending area; a plurality of multiplexers on a side of the bending area away from the display area and on the substrate, and each multiplexer is at least connected with a signal input line and two signal output lines; and a bonding area on a side of the plurality of multiplexers away from the bending area. The plurality of multiplexers are electrically connected to the plurality of sub-pixels through the bending area. The signal input line is electrically connected to the bonding area. An orthographic projection of the signal input line on the substrate does not overlap with an orthographic projection of the bending area on the substrate.

Find Patent Forward Citations

Liu, Biao. (2026). Display panel for reducing wiring conflict, and display device (U.S. Patent No. 12563914). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12563914

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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